Education


Ph.D. in Computer Architecture

"CPU Accounting in Multi-Threaded Processors" [summary]

University of Catalonia, Computer Architecture Department, Barcelona, Spain
Advisor: Dr. Francisco J. Cazorla, Dr. Miquel Moretó and Prof. Mateo Valero.

 

  2009-2014

M.Sc. in Computer Architecture, Networks and Systems

"CPU Accounting for CMP architectures"

University of Catalonia, Computer Architecture Department, Barcelona, Spain
Advisor: Dr. Francisco J. Cazorla, Dr. Miquel Moretó and Prof. Mateo Valero

 

  2007-2009  

Engineer in Computer

University of Las Palmas de Gran Canaria

 

  2004-2007 

Technical Engineer in Computer Systems

University of Las Palmas de Gran Canaria

  2000-2004

 

Courses, and, Summer schools


Programming and tUning Massively Parallel Systems Summer School (PUMPS)
Barcelona, Barcelona

  July 2012  

ACACES 2009

Fifth International Summer School on Advanced Computer Architecture
and Compilation for Embedded Systems Terrasa (Barcelona), Spain

 

   2009

 

Award


  • Best Student Engineer in Computer in 2007 at University of Las Palmas de Gran Canaria

 

Technical skill and competencies


Computer architecture

  • Specialist in computer architecture and micro-architecture, especially in multi-core and multi-threading processors
  • Knowledge of CPU scheduler in operating system, especially in Linux (Completely Fair Scheduler)
  • Experience with CPU and system-level performance modelling

Programming

  • Good background:
    • C
    • C++
  • Knowledge:
    • R and lattice
    • Perl
    • Java
    • Visual basic
  • Learning:
    • HDL:
      • SystemC
      • VHDL

Languages

  • Spanish: Native
  • English: Professional proficiency

 

Internship


School of Computing Science, Simon Fraser University, Vancouver, Canada
I collaborated with Dr. Alexandra Fedorova
My research focused on improving the time-based CPU scheduler in current operating system
August 2011 – December 2011

update: January 2015